The Community for Technology Leaders
1992 IEEE Multi-Chip Module Conference (1992)
Santa Cruz, CA, USA
March 18, 1992 to March 20, 1992
ISBN: 0-8186-2725-5
TABLE OF CONTENTS

Applications of multichip modules for high speed communications interfaces (PDF)

A. Kozak , Pacific Microelectron. Centre, Burnaby, BC, Canada
pp. 16-18

Bare die testing and MCM probing techniques (PDF)

D.C. Keezer , Center for Microelectron Res., Univ. of South Florida, Tampa, FL, USA
pp. 20-23

Bare die test (PDF)

R.H. Parker , Inf. Sci. Inst., Univ. of Southern California, Marina del Rey, CA, USA
pp. 24-27

Array probe card (PDF)

M. Beiley , Center for Integrated Syst., Stanford Univ., CA, USA
F. Ichishita , Center for Integrated Syst., Stanford Univ., CA, USA
C. Nguyen , Center for Integrated Syst., Stanford Univ., CA, USA
S. Wong , Center for Integrated Syst., Stanford Univ., CA, USA
pp. 28-31

Die for MCMs: IC preparation for testing, analysis and assembly (PDF)

G.A. Forman , General Electric Co., Schenectady, NY, USA
J.A. Nieznanski , General Electric Co., Schenectady, NY, USA
J. Rose , General Electric Co., Schenectady, NY, USA
pp. 32-35

MCM prototyping using overlay interconnect process (PDF)

L.E. Roszel , Texas Instruments, Dallas, TX, USA
pp. 36-39

Fine pitch pad array carrier sockets for multichip modules (PDF)

J.R. Trent , Motorola, Inc, Chandler, AZ, USA
G.L. Westbrook , Motorola, Inc, Chandler, AZ, USA
pp. 40-43

Boundary-scan test structures and test-bench compilation in a multichip module synthesis system (PDF)

R. Vutukuru , Dept. of Electr. & Comput. Eng., Cincinnati Univ., OH, USA
P. Subbarao , Dept. of Electr. & Comput. Eng., Cincinnati Univ., OH, USA
R. Vmuri , Dept. of Electr. & Comput. Eng., Cincinnati Univ., OH, USA
pp. 44-47

Analysis of MCMs using asymptotic waveform evaluation (AWE) (PDF)

M.M. Alaybeyi , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
J.E. Bracken , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
J.Y. Lee , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
V. Raghavan , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
R.J. Trihy , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
R.A. Rohrer , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
pp. 48-51

Pade approximation applied to transient simulation of lossy coupled transmission lines (PDF)

S. Lin , Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
E.S. Kuh , Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
pp. 52-55

Simulation and optimization of interconnect delay and crosstalk in multi-chip modules (PDF)

M. Nakhla , Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
Q.-J. Zhang , Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
pp. 56-59

On the study of skin-effect and dispersion of heavily lossy transmission lines (PDF)

G. Pan , Dept. of Electr. Eng. & Comput. Sci., Wisconsin Univ., Milwaukee, WI, USA
X. Zhu , Dept. of Electr. Eng. & Comput. Sci., Wisconsin Univ., Milwaukee, WI, USA
B. Wang , Dept. of Electr. Eng. & Comput. Sci., Wisconsin Univ., Milwaukee, WI, USA
pp. 60-63

Assembly and reliability of micro-scale solder interconnections for flip-chip MCMs (PDF)

T.D. Dudderar , AT&T Bell Labs., Murray Hill, NJ, USA
Y. Degani , AT&T Bell Labs., Murray Hill, NJ, USA
N. Nir , AT&T Bell Labs., Murray Hill, NJ, USA
A.R. Storm , AT&T Bell Labs., Murray Hill, NJ, USA
K.L. Tai , AT&T Bell Labs., Murray Hill, NJ, USA
pp. 64-67

Yield modeling of MCM assembly with flip-chip thermocompression bondings (PDF)

S.-Y. Kang , Dept. of Mech. Eng., Colorado Univ., Boulder, CO, USA
Y.C. Lee , Dept. of Mech. Eng., Colorado Univ., Boulder, CO, USA
pp. 68-71

Chip on tape qualification and reliability (PDF)

T.-C. Wang , VLSI Technology Inc., San Jose, CA, USA
J. Long , VLSI Technology Inc., San Jose, CA, USA
P. Kwong , VLSI Technology Inc., San Jose, CA, USA
pp. 72-74

Delay macromodels for point-to-point MCM interconnections (PDF)

A.I. Kayssi , Dept. of Electr. Eng. & Comput Sci., Michigan Univ., Ann Arbor, MI, USA
K.A. Sakallah , Dept. of Electr. Eng. & Comput Sci., Michigan Univ., Ann Arbor, MI, USA
pp. 79-82

Full wave electrical modeling of MCM by robust design methodology (PDF)

A. Iqbal , IBM Corp., Hopewell Junction, NY, USA
pp. 83-85

A high-speed multi-dielectric capacitance-extraction algorithm for MCM interconnects (PDF)

Y.L. Le Coz , Dept. of Electr.-Comput.-Syst. Eng., Rensselaer Polytech. Inst., Troy, NY, USA
pp. 86-89

An integrated approach for electrical performance analysis of multichip modules (PDF)

J.C. Liao , Intel Corp., Chandler, AZ, USA
G.N. Choksi , Intel Corp., Chandler, AZ, USA
pp. 90-93

Yield and reliability concerns in polyimide based multi-chip modules (PDF)

V. Murali , Intel Corp., Santa Clara, CA, USA
T. Rucker , Intel Corp., Santa Clara, CA, USA
J. Fu , Intel Corp., Santa Clara, CA, USA
R. Shukla , Intel Corp., Santa Clara, CA, USA
pp. 98-101

Multichip module enables for high reliability applications (PDF)

D. Chu , Sandia Nat. Labs., Albuquerque, NM, USA
C.A. Reber , Sandia Nat. Labs., Albuquerque, NM, USA
B.L. Draper , Sandia Nat. Labs., Albuquerque, NM, USA
J.N. Sweet , Sandia Nat. Labs., Albuquerque, NM, USA
D.W. Palmer , Sandia Nat. Labs., Albuquerque, NM, USA
pp. 102-105

Effect of humidity cycling on reliability of overlaid high density interconnects (PDF)

X. Shan , Maryland Univ., College Park, MD, USA
R.K. Agarwal , Maryland Univ., College Park, MD, USA
M. Pecht , Maryland Univ., College Park, MD, USA
pp. 106-108

Design of a silicon-on-silicon multi-chip module for a high-performance Ps/2 workstation (PDF)

W.E. Pence , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
D.F. McQueeney , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
pp. 110-113

A multi-chip module for hand-held digital cellular mobile telephone (PDF)

S.H. Bang , Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
B.J. Sheu , Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
pp. 115-118

Peripheral circuit design for field programmable MCM systems (PDF)

I. Dobbelaere , Inf. Syst. Lab., Stanford Univ., CA, USA
A. El Gamal , Inf. Syst. Lab., Stanford Univ., CA, USA
D. How , Inf. Syst. Lab., Stanford Univ., CA, USA
B. Kleveland , Inf. Syst. Lab., Stanford Univ., CA, USA
pp. 119-122

System partitioning for multi-chip modules under timing and capacity constraints (PDF)

M. Shih , Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
E.S. Kuh , Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
pp. 123-126

Early system analysis of cache performance for RISC systems (PDF)

J.D. Roberts , Dept. of Comput. Eng., California Univ., Santa Cruz, CA, USA
W.W.-M. Dai , Dept. of Comput. Eng., California Univ., Santa Cruz, CA, USA
pp. 130-133

Performance modeling of a cache system with three interconnect technologies: cyanate ester PCB, chip-on-board and Cu/PI MCM (PDF)

J. Shiao , Tandem Computers Inc., Cupertino, CA, USA
D. Nguyen , Tandem Computers Inc., Cupertino, CA, USA
pp. 134-179

Electrical analysis of a thin film multichip module substrate (PDF)

W. Blood , Motorola Inc., Chandler, AZ, USA
W.-Y. Yip , Motorola Inc., Chandler, AZ, USA
pp. 138-141

High-density, array, optical interconnects for multi-chip modules (PDF)

K.P. Jackson , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
pp. 142-145

Fully integrated silicon based optical motherboards (PDF)

D. Godfrey , BT Labs., Ipswich, UK
S. Bailey , BT Labs., Ipswich, UK
K. Cooper , BT Labs., Ipswich, UK
M. Nield , BT Labs., Ipswich, UK
J. Hill , BT Labs., Ipswich, UK
D. Welbourn , BT Labs., Ipswich, UK
pp. 146-149

Optical interfaces for multichip modules (PDF)

P.O. Haugsjaa , GTE Laboratories Inc., Waltham, MA, USA
pp. 150-153

Silicon-on-silicon MCMs with integrated passive components (PDF)

R.C. Frye , AT&T Bell Labs., Murray Hill, NJ, USA
K.L. Tai , AT&T Bell Labs., Murray Hill, NJ, USA
M.Y. Lau , AT&T Bell Labs., Murray Hill, NJ, USA
A.W.C. Lin , AT&T Bell Labs., Murray Hill, NJ, USA
pp. 155-158

Characteristics of thin-film devices for a stack-type MCM (PDF)

S. Takahashi , NEC Corp., Kanagawa, Japan
Y. Hayashi , NEC Corp., Kanagawa, Japan
T. Kunio , NEC Corp., Kanagawa, Japan
N. Endo , NEC Corp., Kanagawa, Japan
pp. 159-162

Rapid prototyping of multi-chip modules (PDF)

R. Miracky , Microelectronics & Computer Technol. Corp., Austin, TX, USA
C. Galanakis , Microelectronics & Computer Technol. Corp., Austin, TX, USA
H. Hashemi , Microelectronics & Computer Technol. Corp., Austin, TX, USA
T. Hirsch , Microelectronics & Computer Technol. Corp., Austin, TX, USA
S. Madere , Microelectronics & Computer Technol. Corp., Austin, TX, USA
H. Muller , Microelectronics & Computer Technol. Corp., Austin, TX, USA
T. Rudwick , Microelectronics & Computer Technol. Corp., Austin, TX, USA
S. Sommerfeldt , Microelectronics & Computer Technol. Corp., Austin, TX, USA
pp. 163-166

An overlay interconnect technology for 1 GHz and above MCMs (PDF)

M. Gdula , GE Corporate Res. & Dev. Center, Schenectady, NY, USA
W.P. Kornrumpf , GE Corporate Res. & Dev. Center, Schenectady, NY, USA
pp. 171-174

High-performance MCM interconnection circuits and fluxoelectronics (PDF)

U. Ghoshal , Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
T. Van Duzer , Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
pp. 175-178
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