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Proceedings of IEEE 24th International Symposium on Fault- Tolerant Computing (1994)
Austin, TX, USA
June 15, 1994 to June 17, 1994
ISBN: 0-8186-5520-8
TABLE OF CONTENTS

Durable memory RS/6000 system design (PDF)

J. Murdock , IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA
M. Abbott , IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA
L. Herger , IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA
M. Kauffmann , IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA
K. Mak , IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA
D. Har , IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA
C. Schulz , IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA
T.B. Smith , IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA
B. Tremaine , IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA
D. Yeh , IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA
L. Wong , IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA
pp. 414-423

Test pattern generation for path delay faults in synchronous sequential circuits using multiple fast clocks and multiple observation times (PDF)

P. Uppaluri , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
I. Pomeranz , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
S.M. Reddy , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
pp. 456-465

Checkpoint/rollback in a distributed system using coarse-grained dataflow (PDF)

D. Cummings , Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
L. Alkalaj , Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
pp. 424-433

Highly available cluster: a case study (PDF)

A. Azagury , IBM Israel Sci. & Technol. Center, Haifa, Israel
D. Dolev , IBM Israel Sci. & Technol. Center, Haifa, Israel
G. Goft , IBM Israel Sci. & Technol. Center, Haifa, Israel
J. Marberg , IBM Israel Sci. & Technol. Center, Haifa, Israel
J. Satran , IBM Israel Sci. & Technol. Center, Haifa, Israel
pp. 404-413

Optimal fault-tolerant leader election in chordal rings (PDF)

B. Mans , Dept. d'Inf., Quebec Univ., Hull, Que., Canada
pp. 392-401

Fault-tolerant routing strategy in hypercube systems (PDF)

Ge-Ming Chiu , Dept. of Electr. Eng. & Technol., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
Shui-Pao Wu , Dept. of Electr. Eng. & Technol., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
pp. 382-391

Connectivity and fault tolerance of multiple-bus systems (PDF)

Hung-Kuei Eu , Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
J.P. Nayes , Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
pp. 372-381

Training techniques to obtain fault-tolerant neural networks (PDF)

Ching-Tai Chin , Sch. of Comput. & Inf. Sci., Syracuse Univ., NY, USA
K. Mehrotra , Sch. of Comput. & Inf. Sci., Syracuse Univ., NY, USA
C.K. Mohan , Sch. of Comput. & Inf. Sci., Syracuse Univ., NY, USA
S. Rankat , Sch. of Comput. & Inf. Sci., Syracuse Univ., NY, USA
pp. 360-369

On latching probability of particle induced transients in combinational networks (PDF)

P. Liden , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
P. Dahlgren , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
R. Johansson , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
J. Karlsson , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
pp. 340-349

Identifying software problems using symptoms (PDF)

I. Lee , Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
R.K. Iyer , Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
pp. 320-329

A study of throughput degradation following single node failure in a data sharing system (PDF)

N.S. Bowen , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
pp. 310-319

On the use and implementation of message logging (PDF)

E.N. Elnozahy , Sch. of Comput. Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA
pp. 298-307

Faster checkpointing with N+1 parity (PDF)

J.S. Plank , Dept. of Comput. Sci., Tennessee Univ., Knoxville, TN, USA
pp. 288-297

A cache protocol for error detection and recovery in fault-tolerant computing systems (PDF)

Chung-Ho Chen , Dept. of Electr. Eng., Nat. Yunlin Inst. of Technol., Taiwan
pp. 278-287

Efficient algorithmic circuit verification using indexed BDDs (PDF)

J. Bitner , Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
J. Jain , Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
M. Abadir , Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
J.A. Abraham , Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
D.S. Fussell , Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
pp. 266-275

Behavioral synthesis of testable designs (PDF)

A. Mujumdar , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
R. Jain , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
K. Saluja , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
pp. 436-445

Implementing fault tolerance with an attribute and functional based model (PDF)

M. Suzuki , School of Information Sci., Japan Adv. Inst. of Sci. & Technol., Ishikawa, Japan
T. Katayama , School of Information Sci., Japan Adv. Inst. of Sci. & Technol., Ishikawa, Japan
pp. 244-253

The performance of two-phase commit protocols in the presence of site failures (PDF)

M.L. Liu , Dept. of Comput. Sci., California Univ., Santa Barbara, CA, USA
D. Agrawal , Dept. of Comput. Sci., California Univ., Santa Barbara, CA, USA
A. El Abbadi , Dept. of Comput. Sci., California Univ., Santa Barbara, CA, USA
pp. 234-243

Balanced codes for noise reduction in VLSI systems (PDF)

L. Tallini , Oregon State Univ., Corvallis, OR, USA
L. Merani , Oregon State Univ., Corvallis, OR, USA
B. Bose , Oregon State Univ., Corvallis, OR, USA
pp. 212-218

A SEC-BED-DED code with byte plus bit error detection (PDF)

L.A. Dunning , Dept. of Comput. Sci., Bowling Green State Univ., OH, USA
pp. 208-211

A service policy for real-time customers with (m,k) firm deadlines (PDF)

M. Hamdaoui , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
P. Ramanathan , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
pp. 196-205

Roll-forward and rollback recovery: performance-reliability trade-off (PDF)

D.K. Pradhan , Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
N.H. Vaidya , Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
pp. 186-195

Performability-driven adaptive fault tolerance (PDF)

A.T. Tai , Dept. of Comput. Sci., Texas Univ., Dallas, TX, USA
pp. 176-185

Checking linked data structures (PDF)

N.M. Amato , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
M.C. Loui , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
pp. 164-173

Systematic incorporation of efficient fault tolerance in systems of cooperating parallel programs (PDF)

I-Ling Yen , Dept. of Comput. Sci., Michigan State Univ., East Lansing, MI, USA
pp. 154-163

Checking mergeable priority queues (PDF)

J.D. Bright , Dept. of Comput. Sci., Johns Hopkins Univ., Baltimore, MD, USA
G.P. Sullivan , Dept. of Comput. Sci., Johns Hopkins Univ., Baltimore, MD, USA
pp. 144-153

Modeling and analysis of system dependability using the System Availability Estimator (PDF)

A.M. Blum , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
A. Goyal , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
P. Heidelberger , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
S.S. Lavenberg , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
pp. 137-141

Automatic verifying approach for product specification using FTA (PDF)

T. Fukaya , Res. & Dev. Center, Toshiba Corp., Kawasaki, Japan
M. Hirayama , Res. & Dev. Center, Toshiba Corp., Kawasaki, Japan
Y. Mihara , Res. & Dev. Center, Toshiba Corp., Kawasaki, Japan
pp. 131-133

Concurrent error-detection and modular fault-tolerance in a 32-bit processing core for embedded space flight applications (PDF)

J. Gaisler , On-board Data Div., Eur. Space Res. & Technol. Centre, Noordwijk, Netherlands
pp. 128-130

On codeword testing of two-rail and parity TSC checkers (PDF)

S.M. Reddy , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
I. Pomeranz , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
R. Jain , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
pp. 116-125

SEU-tolerant SRAM design based on current monitoring (PDF)

F. Vargas , TIMA/INPG Lab., Grenoble, France
M. Nicolaidis , TIMA/INPG Lab., Grenoble, France
pp. 106-115

Concurrent error detection in self-timed VLSI (PDF)

D.A. Rennels , Comput. Sci. Dept., California State Univ., Los Angeles, CA, USA
Hyeongil Kim , Comput. Sci. Dept., California State Univ., Los Angeles, CA, USA
pp. 96-105

Device-level transient fault modeling (PDF)

G.L. Ries , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
G.S. Choi , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
R.K. Iyer , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
pp. 86-94

On microprocessor error behavior modeling (PDF)

M. Rimen , Lab. for Dependable Computing, Chalmers Univ. of Technol., Goteborg, Sweden
J. Ohlsson , Lab. for Dependable Computing, Chalmers Univ. of Technol., Goteborg, Sweden
J. Torin , Lab. for Dependable Computing, Chalmers Univ. of Technol., Goteborg, Sweden
pp. 76-85

Fault injection into VHDL models: the MEFISTO tool (PDF)

E. Jenn , Lab. d'Autom. et d'Anal. des Syst., CNRS, Toulouse, France
J. Arlat , Lab. d'Autom. et d'Anal. des Syst., CNRS, Toulouse, France
pp. 66-75

Analysis and experimental evaluation of comparison-based system-level diagnosis for multiprocessor systems (PDF)

Hongying Wang , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
D.M. Blough , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
pp. 55-64

Diagnosis of processor arrays (PDF)

L. Baldelli , Dipartimento di Inf., Pisa Univ., Italy
P. Maestrini , Dipartimento di Inf., Pisa Univ., Italy
pp. 48-54

Algorithm-based fault location and recovery for matrix computations (PDF)

A. Roy-Chowdhury , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
P. Banerjee , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
pp. 38-47

Replication and allocation of task modules in distributed real-time systems (PDF)

Chao-Ju Hou , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
pp. 26-35

Analysis of a fault-tolerant multiprocessor scheduling algorithm (PDF)

D. Mosse , Dept. of Comput. Sci., Pittsburgh Univ., PA, USA
R. Melhem , Dept. of Comput. Sci., Pittsburgh Univ., PA, USA
S. Ghosh , Dept. of Comput. Sci., Pittsburgh Univ., PA, USA
pp. 16-25

Effects of resource utilization monitoring in fault recovery (PDF)

T.R. Sarnaik , Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
pp. 6-15
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