The Community for Technology Leaders
Proceedings of IEEE 24th International Symposium on Fault- Tolerant Computing (1994)
Austin, TX, USA
June 15, 1994 to June 17, 1994
ISBN: 0-8186-5520-8
pp: 116-125
S.M. Reddy , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
I. Pomeranz , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
R. Jain , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
ABSTRACT
We propose a method to test totally self-checking (TSC) two-rail and parity checkers to detect multiple faults using codewords as test patterns. Earlier methods that considered multiple line stuck-at faults in TSC checkers proposed solutions requiring the use of non-code inputs. The disadvantage of using non-code inputs to test a checker is that if the checker is integrated into the circuit being monitored, then special additional hardware is necessary to generate such inputs. Hardware to generate noncodeword tests is not required by the proposed procedure. Even though we have shown that the method proposed is applicable to multiple line stuck-at, multiple stuck-open, gate and path delay faults, in this paper we report the details for multiple line stuck-at faults only.<>
INDEX TERMS
logic circuits, circuit reliability, logic testing, codes
CITATION

S. Reddy, I. Pomeranz and R. Jain, "On codeword testing of two-rail and parity TSC checkers," Proceedings of IEEE 24th International Symposium on Fault- Tolerant Computing(FTCS), Austin, TX, USA, 1994, pp. 116-125.
doi:10.1109/FTCS.1994.315651
91 ms
(Ver 3.3 (11022016))