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1992 FTCS - The Twenty-Second International Symposium on Fault-Tolerant Computing (1992)
Boston, MA, USA
July 8, 1992 to July 10, 1992
ISBN: 0-8186-2875-8
TABLE OF CONTENTS

Failure mode assumptions and assumption coverage (PDF)

D. Powell , LAAS-CNRS, Toulouse, France
pp. 386-395

Wafer testing with pairwise comparisons (PDF)

K. Huang , McGill Univ., Montreal, Que., Canada
V.K. Agarwal , McGill Univ., Montreal, Que., Canada
pp. 374-383

Chip test optimization using defect clustering information (PDF)

A.D. Singh , Dept. of Electr. Eng., Auburn Univ., AL, USA
pp. 366-373

A new statistical approach for fault-tolerant VLSI systems (PDF)

C.H. Stapper , IBM Technol. Products, Essex Junction, VT, USA
pp. 356-365

Fault injection for the formal testing of fault tolerance (PDF)

D. Avresky , LAAS-CNRS, Toulouse, France
J. Arlat , LAAS-CNRS, Toulouse, France
J.-C. Laprie , LAAS-CNRS, Toulouse, France
Y. Crouzet , LAAS-CNRS, Toulouse, France
pp. 345-354

FERRARI: a tool for the validation of system dependability properties (PDF)

G.A. Kanawati , Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
N.A. Kanawati , Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
J.A. Abraham , Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
pp. 336-344

Two software techniques for on-line error detection (PDF)

G. Miremadi , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
J. Harlsson , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
U. Gunneflo , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
J. Torin , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
pp. 328-335

A study of the effects of transient fault injection into a 32-bit RISC with built-in watchdog (PDF)

J. Ohlsson , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
M. Rimen , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
U. Gunneflo , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
pp. 316-325

Direct methods for synthesis of self-monitoring state machines (PDF)

S.H. Robinson , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
J.P. Shen , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
pp. 306-315

On combining off-line BIST and on-line control flow checking (PDF)

B. Eschermann , Elektrotech. und Inf., Univ.-GH-Siegen, Germany
pp. 298-305

A structural technique for fault-protection in asynchronous interfaces (PDF)

A.V. Yakovlev , Comput. Lab., Newcastle upon Tyne Univ., UK
pp. 288-295

Incorporating testability considerations in high-level synthesis (PDF)

A. Mujumdar , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
K. Saluja , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
R. Jain , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
pp. 272-279

Removal of redundancy in logic circuits under classification of undetectable faults (PDF)

S. Kajihara , Dept. of Appl. Phys., Osaka Univ., Japan
H. Shiba , Dept. of Appl. Phys., Osaka Univ., Japan
K. Kinoshita , Dept. of Appl. Phys., Osaka Univ., Japan
pp. 263-270

Testing with correlated test vectors (PDF)

S. Bou-Ghazale , IBM Corp., Boca Raton, FL, USA
pp. 254-262

An efficient test generation algorithm based on search state dominance (PDF)

T. Fujino , Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan
H. Fujiwara , Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan
pp. 246-253

Finite state machine testing based on growth and disappearance faults (PDF)

M.K. Srinivas , Indian Inst. of Sci., Bangalore, India
J. Jacob , Indian Inst. of Sci., Bangalore, India
pp. 238-245

A divide-and-conquer approach to test generation for large synchronous sequential circuits (PDF)

I. Pomeranz , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
S.M. Reddy , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
pp. 230-237

A posteriori agreement for fault-tolerant clock synchronization on broadcast networks (PDF)

P. Verissimo , Tech. Univ. of Lisboa, Portugal
L. Rodrigues , Tech. Univ. of Lisboa, Portugal
pp. 527-536

Scheduling with rollback constraints in high-level synthesis of self-recovering ASICs (PDF)

R. Karri , Dept. of Comput. Sci. & Eng., California Univ., San Diego, CA, USA
A. Orailoglu , Dept. of Comput. Sci. & Eng., California Univ., San Diego, CA, USA
pp. 519-526

Improved construction methods for error correcting constant weight codes (PDF)

S. Al-Bassam , Dept of Comput. Sci., King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia
pp. 510-517

Efficient multiple undirectional byte error-detecting codes for computer memory systems (PDF)

T.R.N. Rao , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
G.L. Feng , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
M.S. Kolluru , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
pp. 502-509

Single b-bit byte error correcting and double bit error detecting codes for high-speed memory systems (PDF)

E. Fujiwara , Dept. of Comput. Sci., Tokyo Inst. of Technol., Japan
M. Hamada , Dept. of Comput. Sci., Tokyo Inst. of Technol., Japan
pp. 494-501

Unordered error-correcting codes and their applications (PDF)

M. Blaum , IBM Almaden Res. Center, San Jose, CA, USA
J. Bruck , IBM Almaden Res. Center, San Jose, CA, USA
pp. 486-493

Recovery/serviceability system test improvements for the IBM ES/9000 520 based models (PDF)

A.C. Merenda , IBM, Poughkeepsie, NY, USA
E. Merenda , IBM, Poughkeepsie, NY, USA
pp. 463-467

Outage times in fault-tolerant systems (PDF)

A. Reibman , AT&T Bell Lab., Holmdel, NJ, USA
pp. 458-462

Design and analysis of software reconfiguration strategies for hypercube multicomputers under multiple faults (PDF)

M. Peercy , Center for Reliable & High-Performance Comput., Illinois Univ., Urbana, IL, USA
P. Banerjee , Center for Reliable & High-Performance Comput., Illinois Univ., Urbana, IL, USA
pp. 448-455

Efficient utilization of spare capacity for fault detection and location in multiprocessor systems (PDF)

S. Tridandapani , Washington Univ., Seattle, WA, USA
A.K. Somani , Washington Univ., Seattle, WA, USA
pp. 440-447

More robust tests in algorithm-based fault-tolerant matrix multiplication (PDF)

F.T. Assad , Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA
S. Dutt , Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA
pp. 430-439

Protecting practical FFT implementations that share common processing elements (PDF)

J. Sung , California Univ., Davis, CA, USA
R. Redinbo , California Univ., Davis, CA, USA
pp. 420-429

Fault tolerant neural networks in optimization problems (PDF)

Y. Koyanagi , Dept. of Comput. Sci., Tokyo Inst. of Technol., Japan
Y. Tohma , Dept. of Comput. Sci., Tokyo Inst. of Technol., Japan
pp. 412-418

Optimal algorithms for exact, inexact, and approval voting (PDF)

B. Parhami , Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
pp. 404-411

Closure and convergence: a formulation of fault-tolerant computing (PDF)

A. Arora , Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
pp. 396-403

Models for time coalescence in event logs (PDF)

J.P. Hansen , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
D.P. Siewiorek , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
pp. 221-227

Reliability modeling of large fault-tolerant systems (PDF)

N. Suri , Allied-Signal Aerosp. Co., Columbia, MD, USA
M.M. Hugue , Allied-Signal Aerosp. Co., Columbia, MD, USA
pp. 212-220

Scheduling message processing for reducing rollback propagation (PDF)

Y.-M. Wang , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
W.K. Fuchs , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
pp. 204-211

Performance bounds in list scheduling of redundant tasks on multiprocessors (PDF)

D.-T. Peng , Allied-Signal Aerosp. Technol. Center, Columbia, MD, USA
pp. 196-203

Routing in modular fault tolerant multiprocessor systems (PDF)

M.S. Alam , Dept. of Comput. Sci., Pittsburgh Univ., PA, USA
R.G. Melhem , Dept. of Comput. Sci., Pittsburgh Univ., PA, USA
pp. 185-193

Optimal ring embedding in hypercubes with faulty links (PDF)

S. Latifi , Dept. of Electr. & Comput. Eng., Nevada Univ., Las Vegas, NV, USA
pp. 178-184

Efficient fault-tolerant mesh and hypercube architectures (PDF)

J. Bruck , IBM Almaden Res. Center, San Jose, CA, USA
R. Cypher , IBM Almaden Res. Center, San Jose, CA, USA
C.-T. Ho , IBM Almaden Res. Center, San Jose, CA, USA
pp. 162-169

Design and modeling of clustered RAID (PDF)

A. Merchant , NEC USA, Princeton, NJ, USA
pp. 140-149

Uniformization and exponential transformation: Techniques for fast simulation of highly dependable non-Markovian systems (PDF)

V.F. Nicola , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
P. Heidelberger , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
P. Shahabuddin , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
pp. 130-139

Design and analysis of multibus systems using projective geometry (PDF)

D. Bulka , Dept. of Comput. Sci., Duke Univ., Durham, NC, USA
J.B. Dugan , Dept. of Comput. Sci., Duke Univ., Durham, NC, USA
pp. 122-129

Multiple signature analysis: a framework for built-in self-diagnostic (PDF)

M.G. Karpovsky , Dept. of Electr. Comput. & Syst. Eng., Boston Univ., MA, USA
S.M. Chaudhry , Dept. of Electr. Comput. & Syst. Eng., Boston Univ., MA, USA
L.B. Levitin , Dept. of Electr. Comput. & Syst. Eng., Boston Univ., MA, USA
pp. 112-119

Design of static CMOS self-checking circuits using built-in current sensing (PDF)

J.-C. Lo , Dept. of Electr. Eng., Rhode Island Univ., Kingston, RI, USA
J.C. Daly , Dept. of Electr. Eng., Rhode Island Univ., Kingston, RI, USA
pp. 104-111

Design of fully exercised SFS/SCD logic networks (PDF)

T. Nanya , Dept. of Electr. Eng., Tokyo Inst. of Technol., Japan
S. Hatakenaka , Dept. of Electr. Eng., Tokyo Inst. of Technol., Japan
R. Onoo , Dept. of Electr. Eng., Tokyo Inst. of Technol., Japan
pp. 96-103

Fault-tolerant real-time communication in distributed computing systems (PDF)

Q. Zheng , Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
K.G. Shin , Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
pp. 86-93

Transis: a communication subsystem for high availability (PDF)

Y. Amir , Hebrew Univ. of Jerusalem, Israel
D. Dolev , Hebrew Univ. of Jerusalem, Israel
S. Kramer , Hebrew Univ. of Jerusalem, Israel
D. Malki , Hebrew Univ. of Jerusalem, Israel
pp. 76-84

Branch recovery with compiler-assisted multiple instruction retry (PDF)

N.J. Alewine , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
S.-K. Chen , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
C.-C. Li , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
W.K. Fuchs , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
W.-M. Hwu , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
pp. 66-73

Compiler-assisted static checkpoint insertion (PDF)

J. Long , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
W.K. Fuchs , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
pp. 58-65

Dynamic reconfiguration of CSP programs for fault tolerance (PDF)

P. Jalote , Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kanpur, India
pp. 50-56

Design for fault-tolerance in system ES model 900 (PDF)

L. Spainhower , IBM Corp., Poughkeepsie, NY, USA
J. Isenberg , IBM Corp., Poughkeepsie, NY, USA
R. Chillarege , IBM Corp., Poughkeepsie, NY, USA
J. Berding , IBM Corp., Poughkeepsie, NY, USA
pp. 38-47

Replicated distributed processes in Manetho (PDF)

E.N. Elnozahy , Dept. of Comput. Sci., Rice Univ., Houston, TX, USA
W. Zwaenepoel , Dept. of Comput. Sci., Rice Univ., Houston, TX, USA
pp. 18-27

Protecting processing elements in communications satellites (PDF)

R. Redinbo , Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
pp. 8-17

The state of the practice in fault tolerant systems (PDF)

C.B. Weinstock , Carnegie Mellon Univ., Pittsburgh, PA, USA
W.L. Heimerdinger , Carnegie Mellon Univ., Pittsburgh, PA, USA
pp. 2-5
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