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Third Symposium on the Frontiers of Massively Parallel Computation (1990)
College Park, MD
Oct. 8, 1990 to Oct. 10, 1990
ISBN: 0-8186-2053-6
TABLE OF CONTENTS

A silicon compiler for massively parallel image processing ASICs (PDF)

A. Boubekeur , Inst. Nat. Polytech. de Grenoble/CSI, France
G. Saucier , Inst. Nat. Polytech. de Grenoble/CSI, France
pp. 519-524

A new parallel algorithm for the knapsack problem and its implementation on a hypercube (PDF)

J. Lin , Dept. of Comput. Sci., Brandeis Univ., Waltham, MA, USA
J.A. Storer , Dept. of Comput. Sci., Brandeis Univ., Waltham, MA, USA
pp. 2-7

Toward scalable algorithms for orthogonal shared-memory parallel computers (PDF)

I.D. Scherson , Dept. of Electr. Eng., Princeton Univ., NJ, USA
A. Mehra , Dept. of Electr. Eng., Princeton Univ., NJ, USA
J.L. Rexford , Dept. of Electr. Eng., Princeton Univ., NJ, USA
pp. 12-21

Deterministic PRAM simulation with constant memory blow-up and no time-stamps (PDF)

Y. Aumann , Dept. of Comput. Sci., Hebrew Univ., Jerusalem, Israel
A. Schuster , Dept. of Comput. Sci., Hebrew Univ., Jerusalem, Israel
pp. 22-29

Improved mesh algorithms for straight line detection (PDF)

Y. Pan , Dept. of Comput. Sci., Pittsburgh Univ., PA, USA
H.Y.H. Chuang , Dept. of Comput. Sci., Pittsburgh Univ., PA, USA
pp. 30-33

Random number generators with inherent parallel properties (PDF)

T.L. Yu , Dept. of Comput. Sci., California State Univ., San Bernardino, CA, USA
pp. 34-37

Large integer multiplication on massively parallel processors (PDF)

B.S. Fagin , Thayer Sch. of Eng., Dartmouth Coll., Hanover, NH, USA
pp. 38-42

Performance prediction-How good is good? (PDF)

B. Stramm , CSE Dept., California Univ., San Diego, CA, USA
F. Berman , CSE Dept., California Univ., San Diego, CA, USA
pp. 43-46

Parallel algorithms for 2D Kalman filtering (PDF)

D.J. Potter , Dept. of Electr. & Comput. Eng., Clarkson Univ., Potsdam, NY, USA
M.P. Cline , Dept. of Electr. & Comput. Eng., Clarkson Univ., Potsdam, NY, USA
pp. 47-50

Hash table and sorted array: a case study of multi-entry data structures in massively parallel systems (PDF)

I.-L. Yen , Dept. of Comput. Sci., Houston Univ., TX, USA
D.-R. Leu , Dept. of Comput. Sci., Houston Univ., TX, USA
F. Bastani , Dept. of Comput. Sci., Houston Univ., TX, USA
pp. 51-54

Parallel Kalman filtering on the Connection Machine (PDF)

M.A. Palis , Dept. of Comput. & Inf. Sci., Pennsylvania Univ., Philadelphia, PA, USA
pp. 55-58

Parallel sorting of large arrays on the MasPar MP-1 (PDF)

J.F. Prins , Dept. of Comput. Sci., North Carolina Univ., Chappel Hill, NC, USA
J.A. Smith , Dept. of Comput. Sci., North Carolina Univ., Chappel Hill, NC, USA
pp. 59-64

An asynchronous multiprocessor design for branch-and-bound algorithms (PDF)

K.H. Cheng , Dept. of Comput. Sci., Houston Univ., TX, USA
Q. Wang , Dept. of Comput. Sci., Houston Univ., TX, USA
pp. 65-68

On the scalability of FFT on parallel computers (PDF)

A. Gupta , Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
pp. 69-74

Practical hypercube algorithms for computational geometry (PDF)

P.D. MacKenzie , Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
Q.F. Stout , Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
pp. 75-78

Simulating numerically controlled machining in parallel (PDF)

P. Su , Dartmouth Coll., Hanover, NH, USA
S. Drysdale , Dartmouth Coll., Hanover, NH, USA
pp. 80-89

Massively parallel auction algorithms for the assignment problem (PDF)

J.M. Wein , Dept. of Math., MIT, Cambridge, MA, USA
pp. 90-99

Too many cooks don't spoil the broth: light simulation on massively parallel computers (PDF)

P. Kochevar , Program of Comput. Graphics, Cornell Univ., Ithaca, NY, USA
pp. 100-109

A parallel production system extending OPS5 (PDF)

J.W. Baker , Dept. of Math. & Comput. Sci., Kent State Univ., OH, USA
pp. 110-118

Image reconstruction on hypercube computers (PDF)

E.L. Zapata , Dept. of Electron., Univ. Santiago de Compostela, Spain
pp. 127-134

Mapping finite element graphs on hypercubes (PDF)

Y.-C. Chung , Sch. of Comput. & Inf. Sci., Syracuse Univ., NY, USA
S. Ranka , Sch. of Comput. & Inf. Sci., Syracuse Univ., NY, USA
pp. 135-144

PRA*: a memory-limited heuristic search procedure for the Connection Machine (PDF)

M. Evett , Inst. of Adv. Comput. Studies Maryland Univ., College Park, MD, USA
J. Hendler , Inst. of Adv. Comput. Studies Maryland Univ., College Park, MD, USA
A. Mahanti , Inst. of Adv. Comput. Studies Maryland Univ., College Park, MD, USA
D. Nau , Inst. of Adv. Comput. Studies Maryland Univ., College Park, MD, USA
pp. 145-149

Particles: a naturally parallel approach to modeling (PDF)

D.H. House , Dept. of Comput. Sci., Williams Coll., Williamstown, MA, USA
pp. 150-153

Automatic generation of visualization code for the Connection Machine (PDF)

J.M. Purtilo , Inst. for Adv. Comput. Studies, Maryland Univ., College Park, MD, USA
D.R. Revis , Inst. for Adv. Comput. Studies, Maryland Univ., College Park, MD, USA
pp. 158-161

Korean character recognition using neural networks (PDF)

J. Koh , Syracuse Univ., NY, USA
G.S. Moon , Syracuse Univ., NY, USA
K.G. Mehrotra , Syracuse Univ., NY, USA
C.K. Mohan , Syracuse Univ., NY, USA
S. Ranka , Syracuse Univ., NY, USA
pp. 162-165

Efficient parallel algorithms for search problems: applications in VLSI CAD (PDF)

S. Arvindam , Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
V. Kumar , Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
V.N. Rao , Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
pp. 166-169

Porting an iterative parallel region growing algorithm from the MPP to the MasPar MP-1 (PDF)

J.C. Tilton , NASA Goddard Space Flight Center, Greenbelt, MD, USA
pp. 170-173

A bit-parallel, word-parallel, massively parallel associative processor for scientific computing (PDF)

B.D. Alleyne , Dept. of Electr. Eng., Princeton Univ., NJ, USA
D.A. Kramer , Dept. of Electr. Eng., Princeton Univ., NJ, USA
I.D. Scherson , Dept. of Electr. Eng., Princeton Univ., NJ, USA
pp. 176-185

Achieving multigauge behavior in bit-serial SIMD architectures via emulation (PDF)

F. Annexstein , Dept. of Comput. & Inf. Sci., Massachusetts Univ., Amherst, MA, USA
M. Baumslag , Dept. of Comput. & Inf. Sci., Massachusetts Univ., Amherst, MA, USA
M.C. Herbordt , Dept. of Comput. & Inf. Sci., Massachusetts Univ., Amherst, MA, USA
B. Obrenic , Dept. of Comput. & Inf. Sci., Massachusetts Univ., Amherst, MA, USA
A.L. Rosenberg , Dept. of Comput. & Inf. Sci., Massachusetts Univ., Amherst, MA, USA
C.C. Weems , Dept. of Comput. & Inf. Sci., Massachusetts Univ., Amherst, MA, USA
pp. 186-195

The GPA machine: a generally partitionable MSIMD architecture (PDF)

T. Bridges , Data Parallel Syst. Inc., Bloomington, IN, USA
pp. 196-203

Exploration of reconfigurable architectures: an empirical approach (PDF)

W.B. Ligon , Coll. of Comput., Georgia Inst. of Technol., Atlanta, GA, USA
U. Ramachandran , Coll. of Comput., Georgia Inst. of Technol., Atlanta, GA, USA
pp. 205-214

An optimal lookahead processor to prune search space (PDF)

J. Gu , Dept. of Comput. Sci., Utah Univ., Salt Lake City, UT, USA
pp. 215-224

Parallel relational operations based on clustered surrogate files (PDF)

S.M. Chung , Comput. Sci. & Eng., Wright State Univ., Dayton, OH, USA
pp. 225-234

On single parameter characterization of parallelism (PDF)

D.C. Marinescu , Dept. of Comput. Sci., Purdue Univ., West Lafayette, IN, USA
J.R. Rice , Dept. of Comput. Sci., Purdue Univ., West Lafayette, IN, USA
pp. 235-237

A parallel architecture for high speed data compression (PDF)

J.A. Storer , Dept. of Comput. Sci., Brandeis Univ., Waltham, MA, USA
pp. 238-243

A new computational model for massive parallelism (PDF)

S.Y. Berkovich , Allied-Signal Aerosp. Technol. Center, George Washington Univ., Columbia, MD, USA
pp. 244-250

High performance mapping for massively parallel hierarchical structures (PDF)

S.G. Ziavras , Dept. of Electr. & Comput. Eng., New Jersey Inst. of Technol., Newark, NJ, USA
pp. 251-254

Comparative performance evaluation of a new SIMD machine (PDF)

J.M. Jennings , Dept. of Comput. Sci., North Carolina State Univ., Raleigh, NC, USA
E.W. Davis , Dept. of Comput. Sci., North Carolina State Univ., Raleigh, NC, USA
pp. 255-258

The Digital Transform Machine (PDF)

W.W. Kirkman , Mitre Corp., McLean, VA, USA
pp. 265-269

Designing the 3-LAP (three layers associative processor) for arithmetic and symbolic applications (PDF)

C. Davarakis , Dept. of Comput. Eng., Patras Univ., Greece
D. Maritsas , Dept. of Comput. Eng., Patras Univ., Greece
pp. 270-273

Application specific massively parallel machine (PDF)

T. Shibuya , Fujitsu Lab. Ltd., Kawasaki, Japan
K. Kawamura , Fujitsu Lab. Ltd., Kawasaki, Japan
T. Shindo , Fujitsu Lab. Ltd., Kawasaki, Japan
H. Miwatari , Fujitsu Lab. Ltd., Kawasaki, Japan
Y. Ohki , Fujitsu Lab. Ltd., Kawasaki, Japan
pp. 274-277

Optimal processor-time tradeoffs on massively parallel memory-based architectures (PDF)

H.M. Alnuweiri , Dept. of Comput. Eng., King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia
pp. 278-281

Functional and topological relations among banyan multistage networks of differing switch sizes (PDF)

A. Youssef , Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., Washington, DC, USA
pp. 284-293

On bit-serial packet routing for the mesh and the torus (PDF)

F. Makedon , Comput. Sci. Program, Texas Univ. at Dallas, Richardson, TX, USA
A. Simvonis , Comput. Sci. Program, Texas Univ. at Dallas, Richardson, TX, USA
pp. 294-302

Rearrangeability of shuffle-exchange networks (PDF)

H. Cam , Sch. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
J.A.B. Fortes , Sch. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
pp. 303-314

Multiple channel architecture (PDF)

T.S. Wailes , Sch. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
D.G. Meyer , Sch. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
pp. 315-323

Topological properties of banyan-hypercube networks (PDF)

A. Youssef , Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., Washington, DC, USA
B. Narahari , Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., Washington, DC, USA
pp. 324-332

Array processors with pipelined optical busses (PDF)

Z. Guo , Dept. of Electr. Eng. & Comput. Sci., Pitsburgh Univ., PA, USA
R.G. Melhem , Dept. of Electr. Eng. & Comput. Sci., Pitsburgh Univ., PA, USA
R.W. Hall , Dept. of Electr. Eng. & Comput. Sci., Pitsburgh Univ., PA, USA
D.M. Chiarulli , Dept. of Electr. Eng. & Comput. Sci., Pitsburgh Univ., PA, USA
S.P. Levitan , Dept. of Electr. Eng. & Comput. Sci., Pitsburgh Univ., PA, USA
pp. 333-342

Partitioning on the banyan-hypercube networks (PDF)

A. Bellaachia , Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., Washington, DC, USA
A. Youssef , Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., Washington, DC, USA
pp. 343-351

Designing 3-D optical dilation multistage interconnection networks (PDF)

J.-K. Peir , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
K.-S. Huang , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
pp. 352-357

A distributed backpropagation algorithm of neural networks on distributed-memory multiprocessors (PDF)

H. Yoon , Dept. of Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
J.H. Nang , Dept. of Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
S.R. Maeng , Dept. of Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
pp. 358-363

Fault-tolerance and learning performance of the back-propagation algorithm using massively parallel implementation (PDF)

P. Murali , Dept. of Comput. Sci., George Mason Univ., Fairfax, VA, USA
H. Wechsler , Dept. of Comput. Sci., George Mason Univ., Fairfax, VA, USA
pp. 364-367

An interconnection network and a routing scheme for a massively parallel message-passing multicomputer (PDF)

C. Germain , Univ. Paris Sud, Orsay, France
J.-L. Bechennec , Univ. Paris Sud, Orsay, France
D. Etiemble , Univ. Paris Sud, Orsay, France
J.-P. Sansonnet , Univ. Paris Sud, Orsay, France
pp. 368-371

A fast O(k) multicast message routing algorithm (PDF)

T.J. Sager , Dept. of Comput. Sci., Missouri Uiv., Rolla, MO, USA
B.M. McMillin , Dept. of Comput. Sci., Missouri Uiv., Rolla, MO, USA
pp. 372-375

Simulation of neural networks on a massively parallel computer (DAP-510) using sparse matrix techniques (PDF)

S.N. Gupta , Dept. of Comput. Sci., Old Dominion Univ., Norfolk, VA, USA
M. Zubair , Dept. of Comput. Sci., Old Dominion Univ., Norfolk, VA, USA
C.E. Grosch , Dept. of Comput. Sci., Old Dominion Univ., Norfolk, VA, USA
pp. 376-379

A localized dynamic load balancing strategy for highly parallel systems (PDF)

M. Willebeek-LeMair , Sch. of Electr. Eng., Cornell Univ., Ithaca, NY, USA
A.P. Reeves , Sch. of Electr. Eng., Cornell Univ., Ithaca, NY, USA
pp. 380-383

Generalized supercube: an incrementally expandable interconnection network (PDF)

A. Sen , Dept. of Comput. Sci., Arizona State Univ., Tempe, AZ, USA
pp. 384-387

Data parallel computers and the FORALL statement (PDF)

E. Albert , Compass Inc., Wakefield, MA, USA
pp. 390-396

Data management and control-flow constructs in a SIMD/SPMD parallel language/compiler (PDF)

M.A. Nichols , Sch. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
H.J. Siegel , Sch. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
H.G. Dietz , Sch. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
pp. 397-406

Massive parallelism through program restructuring (PDF)

M. Wolfe , Oregon Graduate Inst. of Sci. & Eng., Beaverton, OR, USA
pp. 407-415

Data optimization: minimizing residual interprocessor data motion on SIMD machines (PDF)

K. Knobe , Compass Inc., Wakefield, MA, USA
V. Natarajan , Compass Inc., Wakefield, MA, USA
pp. 416-423

Index domain alignment: minimizing cost of cross-referencing between distributed arrays (PDF)

J. Li , Dept. of Comput. Sci., Yale Univ., New Haven, CT, USA
M. Chen , Dept. of Comput. Sci., Yale Univ., New Haven, CT, USA
pp. 424-433

Solution to an architectural problem in parallel computing (PDF)

D.-L. Lee , Dept. of Comput. Sci., York Univ., North York, Ont., Canada
pp. 434-442

Divacon: a parallel language for scientific computing based on divide-and-conquer (PDF)

Z.G. Mou , Dept. of Comput. Sci., Brandeis Univ., Waltham, MA, USA
pp. 451-461

A framework for efficient execution of array-based languages on SIMD computers (PDF)

J.F. Prins , Dept. of Comput. Sci., North Carolina Univ., Chapel Hill, NC, USA
pp. 462-470

Vcode: a data-parallel intermediate language (PDF)

G.E. Blelloch , Sch. of Comput. Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA
S. Chatterjee , Sch. of Comput. Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA
pp. 471-480

Concurrent processing with result sharing: model, architecture, and performance analysis (PDF)

S. Krishnaprasad , Dept. of Comput. Sci. & Eng., Southern Methodist Univ., Dallas, TX, USA
B. Shirazi , Dept. of Comput. Sci. & Eng., Southern Methodist Univ., Dallas, TX, USA
pp. 481-488

Exploitation fine-grain parallelism in a combinator-based functional system (PDF)

P.P. Chu , Dept. of Electr. Eng., Cleveland State Univ., OH, USA
pp. 489-493

The StarLite project (PDF)

R.P. Cook , Dept. of Comput. Sci., Virginia Univ., Charlottesville, VA, USA
H. Oh , Dept. of Comput. Sci., Virginia Univ., Charlottesville, VA, USA
pp. 494-498

Mapping reusable software components onto the ARC parallel processor (PDF)

L.R. Welch , Dept. of Comput. & Inf. Sci., Ohio State Univ., Columbus, OH, USA
B.W. Weide , Dept. of Comput. & Inf. Sci., Ohio State Univ., Columbus, OH, USA
pp. 499-502

Early experience with object-oriented message driven computing (PDF)

T.W. Christopher , Dept. of Comput. Sci., Illinois Inst. of Technol., Chicago, IL, USA
pp. 503-506

Design and performance of an optimizing SIMD compiler (PDF)

A.L. Fisher , Sch. of Comput. Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA
J. Leon , Sch. of Comput. Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA
pp. 507-510

Parallel optimization of stack filters (PDF)

K.B. Rao , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
K. Efe , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
C.H. Chu , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
pp. 511-514

How to use up processors (PDF)

J. Hearne , Dept. of Comput. Sci., Western Washington Univ., Bellingham, WA, USA
D. Jusak , Dept. of Comput. Sci., Western Washington Univ., Bellingham, WA, USA
pp. 515-518
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