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Proceedings Second International Conference on Application of Concurrency to System Design (2001)
Newcastle upon Tyne, UK
June 25, 2001 to June 29, 2001
ISBN: 0-7695-1071-X

Reviewers (PDF)

pp. xi
Invited Talks

From Code to Models (Abstract)

Gerard J. Holzmann , Bell Laboratories, Lucent Technologies
pp. 3

Making Meaningful Models for Mere Mortal (an extended abstract) (Abstract)

Jeff Kramer , Imperial College of Science, Technology and Medicine
pp. 11

Overcoming Heterophobia: Modeling Concurrency in Heterogeneous Systems (Abstract)

Jerry Burch , Cadence Berkeley Laboratories
Roberto Passerone , Cadence Design Systems, Inc.
Alberto L. Sangiovanni-Vincentelli , University of California at Berkeley
pp. 13
Performance Issues

Abstracting from Failure Probabilities (Abstract)

Jan Jurjens , University of Oxford
pp. 53
Asynchronous Communication

Algorithms for Signal and Message Asynchronous Communication Mechanisms and Their Analysis (Abstract)

Fei Xia , University of Newcastle upon Tyne
Ian Clark , King's College London
pp. 65
Refinement Issues

Implementing Communicating Processes in the Event of Interface Difference (Abstract)

Jonathan Burton , University of Newcastle
Maciej Koutny , University of Newcastle
Giuseppe Pappalardo , Universit? di Catania
pp. 87
Object-Oriented Approach

From Formal Specifications to Ready-to-Use Software Components: The Concurrent Object Oriented Petri Net Approach (Abstract)

Stanislav Chachkov , Swiss Federal Institute of Technology Lausanne
Didier Buchs , Swiss Federal Institute of Technology Lausanne
pp. 99
Codesign and Embedded Systems

Software Implementation of Synchronous Programs (Abstract)

Charles Andre , University of Nice-Sophia Antipolis/CNRS
Frederic Boulanger , SUPELEC, Service Informatique
Alain Girault , INRIA Rh?ne-Alpes
pp. 133
Asynchronous Circuits

A structural encoding technique for the synthesis of asynchronous circuits (Abstract)

Josep Carmona , Universit? Politecnica de Catalunya
Jordi Cortadella , Universit? Politecnica de Catalunya
Enric Pastor , Universit? Politecnica de Catalunya
pp. 157

Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation (Abstract)

O. Garnica , Universidad Complutense de Madrid
J. Lanchares , Universidad Complutense de Madrid
R. Hermida , Universidad Complutense de Madrid
pp. 167

Towards Synthesis of Monotonic Asynchronous Circuits from Signal Transition Graphs (Abstract)

N. Starodoubtsev , Russian Academy of Sciences
S. Bystrov , Russian Academy of Sciences
M. Goncharov , Russian Academy of Sciences
I. Klotchkov , Russian Academy of Sciences
A. Smirnov , Russian Academy of Sciences
pp. 179
Verification and Testing

Exploration Testing (Abstract)

Juhana Helovuo , Tampere University of Technology
Sari Leppanen , Nokia Research Center
pp. 201

The BDD Space Complexity of Different Forms of Concurrency (Abstract)

Michael Baldamus , University of Karlsruhe
Klaus Schneider , University of Karlsruhe
pp. 231
Petri Net Synthesis

Author Index (PDF)

pp. 255
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